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Sun, 13 Oct Higher price tended to be lower volumes, lower price tended to be higher volumes of course there is the vodka maker tale about 30 percent price increase doubled the volume.
For the most part at this point in timesoftware manufacturing and distribution costs were pretty volume insensitive Anyway in this transition period Wouldn't some of these be rejects with failures in the FP circuitry thus increasing the effective yield of the line?
That many of these failed chips could be compensated for with circuitry that assumed higher latency and large block transfers at least compared to random access memory operational characteristics.
Another kind of yield is sorting for max. Mon, 14 Oct As a result it becomes a lot more complicated to demonstrate a linear economic relationship with one specific item in isolation from the overall infrastructure.
However, if such huge up front infrastructures were developed and delivered only one item The direct linear work effort that went into production of the different items were nearly the same. Wed, 16 Oct Which is in itself something of a pain if you have a big fat box that wou would like to burden additionally with a little light use of some tool.
But yes that is indeed a probable gotcha.
I think that was the 40, copies of linux from two years ago, running in a modest sized LPAR under vm aka VM was providing 40, virtual machines for 40, different copies of linux and VM was running in an LPAR that was less than the whole machine.
This obviously seen in the HA configurations Customer was typically paying more than two times a simple non-ha configuration at least for the hardware I believe one of the other factors was lots of gov. Thu, 17 Oct I don't know if each board had a serial.
I have no idea how the hardware half kept track of their parts. Boards might be possible but not components on boards.
I have heard of people talk about nightmare situations after they got the first or units to customers and a proper tracking system hadn't been set-up before hand. Then along comes field service and begins to really confuse what level are the components at any specific customer location.
I also archived many of the Raid papers from the same time. Fri, 18 Oct The difficulty here is that other CPUs may have allocated the address space a different ASID, so that the flush operation either operates across all processes generating multiple hits in the TLB and requiring hardware to deal with that.
The s TLBs for the TLBs that supported multiple concurrent address spaces were STO associative, which was the consistent real address of the segment table origin, the same across all processors. The IPTE selective invalidate finally appeared with the model in the late '70s. Some of the implementations tended to try and batch up a whole slew of page invalidates at a single time There was some trade-off regarding relatively short-lived kernel operations getting locks on the address space as a means of serializing any page invalidates against that address space.
There was also a lot of discussion in the time-frame about advantages of STE-associative TLBs rather than STO-associative to improve invalidates in the case of segment sharing.
Re-reading what Brian Inglis wrote, I can see how you got the idea that he meant removing all "can't happen" checks. My reading understood that he meant cleaning out "dead code" Surely, checks for "can't happen" often need to be left in.
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